CBT6832D 16-bit controlled enable rate 1-of-2 multiplexer/demultiplexer with precharged outputs and charge pump undershoot protection for live insertion preliminary specification 2000 may 18 integrated circuits
philips semiconductors preliminary specification CBT6832D 16-bit controlled enable rate 1-of-2 multiplexer/demultiplexer with precharged outputs and charge pump undershoot protection for live insertion 2 2000 may 18 features ? 5 w typical r on ? pull-up on b port ? undershoot protection on a port only: 2.0 v ? near zero propagation delay ? controlled enable rate ? v cc operating range: +4.5 v to +5.5 v ? > 100 mhz bandwidth (or clock rate) at 20 pf load capacitance ? 56-pin tssop package ? bias voltage pre-charges the b output when the channel is disabled ? latch-up protection exceeds 100 ma per jesd78 ? esd protection exceeds 2000 v hbm per jesd22-a114, 200 v mm per jesd22-a115 and 1000 v cdm per jesd22-c101 application ? provides pci-x hot-plugging description the CBT6832D is a 16-bit controlled enable rate 1-of-2 multiplexer/demultiplexer with precharged outputs and charge pump undershoot protection for live insertion. advantages of the cbt6832 include a propagation delay of 250 ps, resulting from 5 w channel resistance, and low i/o capacitance. a port demultiplexes to either 1b and 2b, or to both. the switch is bi-directional. pin configuration 1 2 3 4 5 6 7 8 9 10 11 12 45 46 47 48 49 50 51 52 53 54 55 56 1b1 2a 3b1 4b1 4a 5b1 6b1 6a 7b1 8b1 1a 1b2 2b2 3a 3b2 4b2 5a 6b2 5b2 7a 7b2 8b2 8a 13 14 15 16 17 18 39 40 41 42 43 44 gnd v cc 9b1 10b1 10a gnd 9a v cc 9b2 10b2 11b1 19 38 11a 12b1 20 21 22 23 24 25 32 33 34 35 36 37 12a 13b1 14b1 14a 15b1 11b2 13b2 12b2 14b2 15a 15b2 16b1 26 31 16b2 16a 27 30 v bias2 v bias1 28 29 sel1 sel2 2b1 13a sw00478 quick reference data symbol parameter conditions t amb = 25 c; gnd = 0 v typical unit t plh t phl propagation delay an to bn or bn to an c l = 50 pf; v cc = 5 v 0.25 ns c in input capacitance v i = 0 v or v cc 4.5 pf c off b b capacitance, switch off outputs disabled; v o = 0 v 8 pf c off a a capacitance, switch off outputs disabled; v o = 0 v 13 pf c on 1 one channel enabled capacitance one b enabled; v o = 0 v 21 pf c on 2 both channels enabled capacitance both b channels enabled; v o = 0 v 34 pf i ccz total supply current outputs disabled; v cc = 5.5 v m a ordering information packages temperature range order code dwg number 56-pin plastic tssop type ii 40 c to +85 c CBT6832D dgg sot364-1
philips semiconductors preliminary specification CBT6832D 16-bit controlled enable rate 1-of-2 multiplexer/demultiplexer with precharged outputs and charge pump undershoot protection for live insertion 2000 may 18 3 pin description pin number symbol name and function 3, 6, 9, 12, 17, 20, 23, 26, 33, 36, 39, 42, 47, 50, 53, 56 1a116a1 inputs 1, 2, 4, 5, 7, 8, 10, 11, 15, 16, 18, 19, 21, 22, 24, 25 1b116b1 outputs 31, 32, 34, 35, 37, 38, 40, 41, 45, 46, 48, 49, 51, 52, 54, 55 1b216b2 outputs 27, 30 v bias1 , v bias2 precharge bias voltage inputs 28, 29 sel1, sel2 select-control inputs 13, 44 gnd ground (0 v) 14, 43 v cc positive supply voltage function table sel1 sel2 function l h na to nb1 h l na to nb2 l l na to nb1 and nb2 h h nb1, nb2 = v bias logic diagram v bias1 pullup 1b1 v bias2 pullup 1b2 v bias1 pullup 16b1 v bias2 pullup 16b2 1a 16a sel1 sel2 sv01801 absolute maximum ratings 1, 2 symbol parameter conditions rating unit v cc dc supply voltage 0.5 to +7.0 v i ik dc input diode current v i < 0 50 ma v i dc input voltage 3 0.5 to +7.0 v v out dc output voltage 3 output in off or high state 0.5 to +7.0 v i out dc output current output in low state 120 ma t stg storage temperature range 65 to +150 c q ja power dissipation 95 c/w notes: 1. stresses beyond those listed may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditionso is not implied. exposur e to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. the performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create ju nction temperatures which are detrimental to reliability. the maximum junction temperature of this integrated circuit should not excee d 150 c. 3. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. recommended operating conditions symbol parameter limits unit symbol parameter min max unit v cc dc supply voltage 4.5 5.5 v v ih high-level input voltage 2.0 v v il low-level input voltage 0.8 v t amb operating free-air temperature range 40 +85 c
philips semiconductors preliminary specification CBT6832D 16-bit controlled enable rate 1-of-2 multiplexer/demultiplexer with precharged outputs and charge pump undershoot protection for live insertion 2000 may 18 4 dc electrical characteristics over operating temperature range t amb = 40 c to +85 c; v cc = 5 v 10%; v bias = 1.3 v to v cc , unless otherwise specified. symbol parameter test conditions limits unit symbol parameter test conditions min typ 1 max unit v ih input high voltage guaranteed logic high level 2.0 v v il input low voltage guaranteed logic low level 0.5 0.8 v i ih input high current v cc = 5.5 v, v in = v cc 5 m a i il input low current v cc = 5.5 v, v in = gnd 5 m a i ozh high impedance output current a = 0 v or v cc max, v bias1 = v bias2 = v cc max 1 m a i ozl low impedance output current b = 0 v or v cc max, v bias1 = v bias2 = v cc max 0.2 2 ma v ik input clamp voltage v cc = 4.5 v; i i = 18 ma 0.7 1.8 v r switch on resistance 2 v cc = 4.5 v; v i = 0 v; i i = 48 ma 5 8 w r on s w itch on resistance 2 v cc = 4.5 v; v i = 2.4 v; i i = 15 ma 10 15 w capacitance 3 (t amb = +25 c; f = 1 mhz) c in input capacitance v i = 0 v 4.5 pf c off b b capacitance, switch off v i = 0 v 8 pf c off a a capacitance, switch off v i = 0 v 13 pf c on 1 capacitance, switch on (one b) v i = 0 v 21 pf c on 2 capacitance, both b channels enabled v i = 0 v 34 pf power supply i cc quiescent supply current enabled v cc = 5.5 v; v i = v cc or gnd 200 m a d i cc additional supply current per input pin 5 v cc = 5.5 v, one input at 3.4 v, other inputs at v cc or gnd 2.5 ma notes: 1. all typical values are at v cc = 5 v, t amb = +25 c ambient and maximum loading. 2. measured by the voltage drop between the a and the b terminals at the indicated current through the switch. on-state resistance is determined by the lowest voltage of the two (a or b) terminals. 3. these parameters are determined by device characterization, but is not production tested. 4. not more than one output should be shorted at one time. duration of the test should not exceed one second. 5. per ttl driven input (v i = 3.4 v, control inputs only); a and b pins do not contribute to i cc . 6. this current applies to the control inputs only and represent the current required to switch internal capacitance at the spec ified frequency. the a and b inputs generate no significant ac or dc currents as they transition. this parameter is not tested, but is guarantee d by design.
philips semiconductors preliminary specification CBT6832D 16-bit controlled enable rate 1-of-2 multiplexer/demultiplexer with precharged outputs and charge pump undershoot protection for live insertion 2000 may 18 5 ac characteristics v cc = 5.0 v 0.5 v; gnd = 0 v ; c l = 50 pf, r l = 500 w symbol parameter test conditions limits unit symbol parameter test conditions min typ max unit t plh t phl propagation delay 1 a to b 0.25 ns t pzh t pzl bus enable time sel to a, b 10 5 30 25 ns t phz t plz bus disable time sel to a, b 0.5 0.5 6 7 ns note: 1. this parameter is warranted but not production tested. the propagation delay is based on the rc time constant of the typical on-state resistance of the switch and a load capacitance of 50 pf, when driven by an ideal voltage source (zero output impedance). ac waveforms v m = 1.5 v, v in = gnd to 3.0 v input 1.5v output t plh t phl sa00028 1.5v 1.5v 1.5v 3 v 0 v v oh v ol waveform 1. input (an) to output (bn) propagation delays output control (low-level enabling 1.2 v t pzh t phz v oh v ol t pzl t plz 3.5v 0v v ol + 0.3v v oh 0.3v 1.5 v 1.5 v 1.5 v 0v 3v output waveform 1 s1 at 7 v (see note) note: waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. output waveform 2 s1 at open (see note) sa00543 waveform 2. 3-state output enable and disable times test circuit and waveforms c l = 50 pf 500 w load circuit definitions c l = load capacitance includes jig and probe capacitance; see ac characteristics for value. test s1 t pd open t plz /t pzl 7 v t phz /t pzh open sa00012 500 w from output under test s1 7 v open gnd
philips semiconductors preliminary specification CBT6832D 16-bit controlled enable rate 1-of-2 multiplexer/demultiplexer with precharged outputs and charge pump undershoot protection for live insertion 2000 may 18 6 tssop56: plastic thin shrink small outline package; 56 leads; body width 6.1mm sot364-1
philips semiconductors preliminary specification CBT6832D 16-bit controlled enable rate 1-of-2 multiplexer/demultiplexer with precharged outputs and charge pump undershoot protection for live insertion 2000 may 18 7 notes
philips semiconductors preliminary specification CBT6832D 16-bit controlled enable rate 1-of-2 multiplexer/demultiplexer with precharged outputs and charge pump undershoot protection for live insertion 2000 may 18 8 definitions short-form specification e the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition e limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the dev ice at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limi ting values for extended periods may affect device reliability. application information e applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. disclaimers life support e these products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use i n such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes e philips semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. philips semiconductors ass umes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or m ask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right in fringement, unless otherwise specified. philips semiconductors 811 east arques avenue p.o. box 3409 sunnyvale, california 940883409 telephone 800-234-7381 ? copyright philips electronics north america corporation 2000 all rights reserved. printed in u.s.a. date of release: 05-00 document order number: 9397 750 07161
data sheet status objective specification preliminary specification product specification product status development qualification production definition [1] this data sheet contains the design target or goal specifications for product development. specification may change in any manner without notice. this data sheet contains preliminary data, and supplementary data will be published at a later date. philips semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. this data sheet contains final specifications. philips semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. data sheet status [1] please consult the most recently issued datasheet before initiating or completing a design.
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